1. Field of the Invention
The present invention generally relates to the art of processing electrical signals. In particular, the present invention relates to the art of processing analog and digital signals in wireless communcation systems.
2. Description of Related Art
Integrated circuits (ICs) having components to handle analog signals as well as digital signals are often referred to as mixed-signal integrated circuits (MSIC's). One example of an MSIC is an IC designed to convert incoming analog signals to digital signals to be further processed by digital circuits. These are usually referred to as analog to digital converter circuits or ADC's. The MSIC's are becoming increasingly important in the telecommunications industry because MSIC's offer lower power consumption and higher performance. However, utilization of MSIC's such as ADC's in mobile telecommunication systems have been impeded by technical difficulties.
First, the analog-to-digital conversion circuits require high order analog filters but fabrication of high order analog filters in a digital CMOS (Complementary Metal Oxide Semiconductor) fabrication process is, at minimum, not practical.
To convert analog signal to digital signals without losing the information contained in the analog signal, the analog signal must be sampled at a frequency which is, at least, twice the highest frequency of the analog signal to be preserved. This requirement is often referred to as the Nyquist criteria.
For example, audio signals typically range from 20 Hz to 22 KHz. Analog electrical signals representing audio signals are at the same 20 to 22 KHz. To convert the analog signals to digital signals, the sampling frequency, F.sub.s, must be at least 22 KHz. .times.2, or 44 KHz. Of course, if the input frequency is higher, as is the case with radio frequencies, then the sampling frequency must be higher.
Often, to ensure that none of the information of the analog signal is lost, the sampling frequency is set higher than the minimum required. As the sampling frequency increases, the fidelity of the digital data to the analog data increases, thus better preserving the information contained in the analog signal. This also means that the analog to digital conversion is less susceptible to high frequency noise in the analog signal.
On the other hand, the increase in the sampling frequency means that the ADC becomes more complex, operates at higher temperature, consumes more power to handled the increased frequency requirements, and produces additional digital signal output. In addition, the increase in the digital signal output forces the digital circuits to increase in complexity. As a compromise between the competing requirements, often, the sampling frequency is often set at 270 KHz.
Therefore, the tendency in conventional ADC design has been to lower the sampling frequency, and reduce the susceptibility of the ADC to the high frequency noise using a high order analog filter. The high order analog filter is positioned to remove the high frequency noise in the incoming analog signal before being processed by the ADC. This technique is referred to as anti-aliasing, and the analog filter is referred to as the anti-aliasing filter (AAF).
In a wireless mobile communications environment using MSIC's, a basedband receiver requires a SINAD (signal to noise and distortion ratio) value of 59 dB at a sampling rate of 270K samples per second. These are the values prescribed by the industry standard specification for GSM (Global System for Mobile Communications), a worldwide digital cellular standard. At the same time, the required adjacent channel interference (ACI) rejection is at 80 dB/decade with cut-off at 100 KHz. For an ADC in this environment, a fourth order analog filter followed by a 10 bit ADC is conventionally used.
However, the implementation of a fourth order analog filter in a standard digital CMOS process is not feasible because the standard digital CMOS fabrication process does not allow for non-silicide polysilicon resistors. And, without the non-silicide polysilicon resistors, capacitors with adequate capacitance per unit area required to build fourth order analog filters cannot be built.
Second, analog circuits are adversely affected by the relatively noisy digital circuits. Digital circuits, especially the larger digital circuits prevalent in the industry, are very noisy relative to typical analog circuits. The analog circuits surrounding digital circuits may fail due to the noise generated by the digital circuits.
Moreover, increasing miniaturization of electronic devices, especially in the communications market, has required IC chips to become even more tightly integrated. Consequently, the circuits comprising the IC chips, both digital and analog, are being fabricated ever closer to each other, thereby aggravating the negative effects of the noise.
Previous attempts to alleviate the problem focused on the method of shielding or isolating the circuits from each other. For example, the U.S. Pat. No. 4,628,343, entitled "Semiconductor Integrated Circuit Device Free From Mutual Interference Between Circuit Blocks Formed Therein," issued to Yuji Komatsu, discloses an IC where "the first and second circuit blocks are shielded electrically from each other on the surface of the semiconductor chip." [Col. 2 11. 27-30, the Komatsu reference.] In the U.S. Pat. No. 5,453,713, entitled "Noise-Free Islands in Digital Integrated Circuits," issued to Hamid Partovi and Andrew J. Barber, the "integrated circuit chip has both digital and analog circuit functions, with one or more islands for isolating the analog functions from noise caused by the digital functions." [Abstract, the Partovi and Barber reference.] However, in tightly integrated, compact IC packages, shielding or isolation techniques may not be desirable, sufficient, or even feasible.